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TQ Delta, LLC v. 2Wire, Inc.

United States District Court, D. Delaware

August 23, 2019

TQ DELTA, LLC, Plaintiff,
v.
2WIRE, INC., Defendant.

          Brian E. Farnan and Michael J. Farnan, FARNAN LLP, Wilmington, DE; Peter J. McAndrews, Thomas J. Wimbiscus, James P. Murphy, Paul W. McAndrews, Rajendra Chiplunkar, Anna M. Targowska, and Ashley M. Ratycz, MCANDREWS, HELD & MALLOY, LTD., Chicago, IL. Attorneys for Plaintiff.

          Jody C. Barillare, MORGAN LEWIS & BOCKIUS LLP, Wilmington, DE; Brett Schuman, Rachel M. Walsh, and Monte M.F. Cooper, GOODWIN PROCTER LLP, San Francisco, CA. Attorneys for Defendant.

          MEMORANDUM OPINION

          ANDREWS, U.S. DISTRICT JUDGE

         Presently before me is Defendant's Motion for Judgment as a Matter of Law, or in the Alternative, for a New Trial for Family 3. (D.I. 1214). The Parties have fully briefed the issues. (D.I. 1215, 1226, 1230). For the reasons discussed more fully below, I will deny Defendant's motion.

         I. Background

         Plaintiff filed suit on November 4, 2013, alleging that Defendant's DSL customer premise equipment ("CPE") infringes several of its patents. (D.I. 1). I split the case into separate trials based on the asserted patents' families. (D.I. 280). On May 20-23, 2019, 1 held a four-day liability-only jury trial addressing the Family 3 patents. (D.I. 1234-1237 ("Tr.")). The jury found the asserted claims of the Family 3 patents-in-suit valid and infringed. (D.I. 1187).

         The Family 3 patents that went to trial are U.S. Patent Nos. 7, 836, 381 ('"381 Patent"), 7, 844, 882 ('"882 Patent"), and 8, 276, 048 ('"048 Patent"). They relate "to memory sharing in communication systems." ('381 Patent at 1:18-19). The Accused Products are Defendant's CPE that contain certain Broadcom chipsets.

         The jury found that Defendant's CPE infringes a claim from each of the three patents-in-suit. The jury found claim 5 of the '381 Patent valid and infringed:

         A non-transitory computer-readable information storage media having stored thereon instructions, that if executed by a processor, cause to be performed a method for allocating shared memory in a transceiver comprising:

transmitting or receiving, by the transceiver, a message during initialization specifying a maximum number of bytes of memory that are available to be allocated to a deinterleaver;
determining, at the transceiver, an amount of memory required by the deinterleaver to deinterleave a first plurality of Reed Solomon (RS) coded data bytes within a shared memory;
allocating, in the transceiver, a first number of bytes of the shared memory to the deinterleaver to deinterleave a first plurality of Reed Solomon (RS) coded data bytes for reception at a first data rate, wherein the allocated memory for the deinterleaver does not exceed the maximum number of bytes specified in the message;
allocating, in the transceiver, a second number of bytes of the shared memory to an interleaver to interleave a second plurality of RS coded data bytes transmitted at a second data rate; and deinterleaving the first plurality of RS coded data bytes within the shared memory allocated to the deinterleaver and interleaving the second plurality of RS coded data bytes within the shared memory allocated to the interleaver, wherein the shared memory allocated to the deinterleaver is used at the same time as the shared memory allocated to the interleaver.

('381 Patent, claim 5).

         The jury found claim 13 of the '882 Patent valid and infringed:

         A system that allocates shared memory comprising:

a transceiver that performs:
transmitting or receiving a message during initialization specifying a maximum number of bytes of memory that are available to be allocated to a deinterleaver;
determining an amount of memory required by the deinterleaver to deinterleave a first plurality of Reed Solomon (RS) coded data bytes within a shared memory;
allocating a first number of bytes of the shared memory to the deinterleaver to deinterleave a first plurality of Reed Solomon (RS) coded data bytes for reception at a first data rate, wherein the allocated memory for the deinterleaver does not exceed the maximum number of bytes specified in the message;
allocating a second number of bytes of the shared memory to an interleaver to interleave a second plurality of RS coded data bytes transmitted at a second data rate; and
deinterleaving the first plurality of RS coded data bytes within the shared memory allocated to the deinterleaver and interleaving the second plurality of RS coded data bytes within the shared memory allocated to the interleaver, wherein the shared memory allocated to the deinterleaver is used at the same time as the shared memory allocated to the interleaver.

('882 Patent, claim 13).

         And the jury found claim 1 of the '048 Patent ...


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