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TQ Delta, LLC v. 2Wire, Inc.

United States District Court, D. Delaware

April 25, 2019

TQ DELTA, LLC, Plaintiff,
v.
2WIRE, INC., Defendant.

          Brian E. Farnan and Michael J. Farnan, FARNAN LLP, Wilmington, DE; Peter J. McAndrews, Timothy J. Malloy, Thomas J. Wimbiscus, James P. Murphy, Paul W. McAndrews, Rajendra Chiplunkar, and Anna M. Targowska, MCANDREWS, HELD & MALLOY, LTD., Chicago, IL. Attorneys for Plaintiff.

          Jody C. Barillare, MORGAN LEWIS & BOCKIUS LLP, Wilmington, DE; Brett Schuman, Rachel M. Walsh, and Monte M.F. Cooper, GOODWIN PROCTER LLP, San Francisco, CA. Attorneys for Defendant.

          MEMORANDUM OPINION

          ANDREWS, U.S. DISTRICT JUDGE.

         Presently before me are the Parties' Family 3 summary judgment motions: Defendant's Motion for Summary Judgment of Non-Infringement of the Asserted Claims (D.I. 752 (briefing at D.I. 754, 893, 961)); Plaintiffs Motion for Summary Judgment of No. Invalidity of Family 3 Patent Claims under 35 U.S.C. § 112 (D.I. 765 (briefing at D.I. 766, 873, 957)); Defendant's Motion for Summary Judgment of Invalidity of Family 3 Patents (D.I. 773 (briefing at D.I. 774, 892, 963)); Plaintiffs Motion for Summary Judgment of No. Invalidity of Family 3 Patent Claims Under 35 U.S.C. § 103 (D.I. 777 (briefing at D.I. 778, 879, 972)); and Plaintiffs Motion for Summary Judgment of Infringement of Claim 19 of U.S. Patent No. 8, 495, 473 (D.I. 790 (briefing at D.I. 791, 880, 973)). The Parties' Family 3 Daubert motions and motions to strike are also before me: Defendant's Motion to Strike the Untimely Supplemental Expert Reports of Jonathan Putnam Ph.D. and Reply Report of Dr. Kevin Almeroth (D.I. 737 (briefing at D.I. 738, 862, 913)); Defendant's Motion to Preclude the Expert Testimony of Dr. Todor Cooklev for Family 3 (D.I. 760 (briefing at D.I. 763, 890, 960)); Plaintiffs Motion to Preclude Certain Opinions of Dr. Krista S. Jacobsen For Family 3 Patents (D.I. 779 (briefing at D.I. 780, 874, 952)); Defendant's Motion to Preclude the Testimony and Expert Report of Peter Heller Ph.D. on VDSL2 Chip Design (D.I. 785 (briefing at D.I. 786, 886, 964)); and Plaintiffs Motion in the Alternative, for Leave to Serve Attachment M to The Reply Report of Dr. Kevin Almeroth (D.I. 860 (briefing at D.I. 991)). After consideration of the briefing, the motions are resolved as follows.

         I. Background

         Plaintiff filed suit on November 4, 2013, alleging that Defendant's DSL customer premise equipment infringes several of its patents. (D.I. 1). I split the case into separate trials based on the patent families of the asserted patents. (D.I. 280). Fact discovery closed on October 1, 2018. (D.I. 513). Expert discovery for Family 3 closed on February 8, 2019. (Id.). Trial for Family 3 is scheduled for May 20, 2019. (Id.).

         The remaining Family 3 patents are U.S. Patent Nos. 7, 836, 381 ('"381 Patent"), 7, 844, 882 ("'882 Patent"), 8, 276, 048 ('"048 Patent"), and 8, 495, 473 ('"473 Patent").[1] They relate "to memory sharing in communication systems." ('381 Patent at 1:18-19). The Patents share a common specification and have the same drawings. They claim the benefit of an October 12, 2004 provisional patent application, U.S. Provisional Application No. 60/618, 269. The asserted claims of the '381 and '882 Patents were altered post-issuance via certificates of correction.

         Plaintiff asserts one claim from each of the four patents-in-suit. It asserts claim 5 of the '381 Patent:

A non-transitory computer-readable information storage media having stored thereon instructions, that if executed by a processor, cause to be performed a method for allocating shared memory in a transceiver comprising:
transmitting or receiving, by the transceiver, a message during initialization specifying a maximum number of bytes of memory that are available to be allocated to a deinterleaver;
determining, at the transceiver, an amount of memory required by the deinterleaver to deinterleave a first plurality of Reed Solomon (RS) coded data bytes within a shared memory;
allocating, in the transceiver, a first number of bytes of the shared memory to the deinterleaver to deinterleave a first plurality of Reed Solomon (RS) coded data bytes for transmission [reception] at a first data rate, wherein the allocated memory for the deinterleaver does not exceed the maximum number of bytes specified in the message;
allocating, in the transceiver, a second number of bytes of the shared memory to an interleaver to interleave a second plurality of RS coded data bytes received [transmitted] at a second data rate; and
deinterleaving the first plurality of RS coded data bytes within the shared memory allocated to the deinterleaver and interleaving the second plurality of RS coded data bytes within the shred [shared] memory allocated to the interleaver, wherein the shared memory allocated to the deinterleaver is used at the same time as the shared memory allocated to the interleaver.

('381 Patent, claim 5 (original language struck; corrected language in brackets)).

         Plaintiff asserts claim 13 of the '882 Patent:

         A system that allocates shared memory comprising:

a transceiver that performs:
transmitting or receiving a message during initialization specifying a maximum number of bytes of memory that are available to be allocated to a deinterleaver;
determining an amount of memory required by the deinterleaver to deinterleave a first plurality of Reed Solomon (RS) coded data bytes within a shared memory;
allocating a first number of bytes of the shared memory to the deinterleaver to deinterleave a first plurality of Reed Solomon (RS) coded data bytes for transmission [reception] at a first data rate, wherein the allocated memory for the deinterleaver does not exceed the maximum number of bytes specified in the message;
allocating a second number of bytes of the shared memory to an interleaver to interleave a second plurality of RS coded data bytes received [transmitted] at a second data rate; and
deinterleaving the first plurality of RS coded data bytes within the shared memory allocated to the deinterleaver and interleaving the second plurality of RS coded data bytes within the shred [shared] memory allocated to the interleaver, wherein the shared memory allocated to the deinterleaver is used at the same time as the shared memory allocated to the interleaver.

('882 Patent, claim 13 (original language struck; corrected language in brackets)).

         Plaintiff asserts claim 1 of the '048 Patent:

         A system that allocates shared memory comprising:

a transceiver that is capable of:
transmitting or receiving a message during initialization specifying a maximum number of bytes of memory that are available to be allocated to an interleaver;
determining an amount of memory required by the interleaver to interleave a first plurality of Reed Solomon (RS) coded data bytes within the shared memory;
allocating a first number of bytes of the shared memory to the interleaver to interleave the first plurality of Reed Solomon (RS) coded data bytes for transmission at a first data rate, wherein the allocated memory for the interleaver does not exceed the maximum number of bytes specified in the message;
allocating a second number of bytes of the shared memory to a deinterleaver to deinterleave a second plurality of RS coded data bytes received at a second data rate; and
interleaving the first plurality of RS coded data bytes within the shared memory allocated to the interleaver and deinterleaving the second plurality of RS coded data bytes within the shared memory allocated to the deinterleaver, wherein the shared memory allocated to the interleaver is used at the same time as the shared memory allocated to the deinterleaver.

('048 Patent, claim 1).

         And Plaintiff asserts claim 19 of the '473 Patent:

An apparatus comprising:
a multicarrier communications transceiver that is configured to perform an interleaving function associated with a first latency path and perform a deinterleaving function associated with a second latency path, the multicarrier communications transceiver being associated with a memory,
wherein the memory is allocated between the interleaving function and the deinterleaving function in accordance with a message received during an initialization of the transceiver and wherein at least a portion of the memory may be allocated to the interleaving function or the deinterleaving function at any one particular time depending on the message.

('473 Patent, claim 19).

         I previously construed disputed terms of the asserted patents. (D.I. 454). The Parties have identified certain construed terms ...


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